ASIC Mixed-Signal Verification Engineer (d/m/f)
Garching, Bavaria, Germany – ams Sensors Germany GmbH
What we expect
- Define verification strategy as per system requirements. Define testbench architecture, verification plan, and interact with design teams for feature extraction
- Perform analog/real-number behavioral modelling and Validation
- Perform analog netlist extraction for digital-mixed signal testbench
- Perform execution of verification plans, which includes AMS system-level verification on re-used UVM-based testbench
- Support technical communication with customers and participate in design reviews; ensure schedule adherence and interactive problem solving
Who we are looking for
- Master’s or Bachelor’s degree in Electrical Engineering with emphasis in Design Verification or a similar specialty, as well as proven industry experience
- Expertise in block- and system-level verification with reusable components, testbench architecture and verification planning
- Experience with analog behavioral modelling with System Verilog RNM and Verilog-AMS
- Experience with relevant EDA tools and familiarity with scripting languages (e.g. Python, SKILL)
- Excellent team player; calm professional demeanor and excellent listening skills, ability to organize and prioritize work
- Fluency in English
Contact
Stefanie Kleierl will be happy to answer any questions you may have.
Phone: +49 941 850 1391
E-Mail: stefanie.kleierl@ams-osram.com
For data protection reasons, we only accept applications submitted through our applicant portal. This allows you to view the status of your application in your profile at any time.
Job details
| Posting date: | 2025/02/27 |
|---|---|
| Experience level: | Professional (> 3 Years) |
| Type of contract: | Permanent |
| Employment type: | Full-time |
| Work Model: | Hybrid 50 % |
| Business unit: | CMOS Sensors & ASICs |
| Organization: | ams Sensors Germany GmbH |
| Job field: | Research & Development |
| Job ID: | 20221 |
