Internship - Physical Layout Verification (m/f/d)
Premstätten, Styria, Austria – ams-OSRAM AG
What we expect
• Support PLV team with QA and regression tests (RT) for IC Layout Design-Rules
• Usage of AI to develop and run consistency checks between ams-OSRAM Design-Rule documents, available regression test set and implemented Design-Rule checks
• Support and documentation
Who we are looking for
• Competency and experience in programming and electronics is beneficial
• Preferably HTL, FH or university students in scientific disciplines (i.e. physics, electronics, software engineering or informatic)
• Ability to work independently and with accuracy
• Fluent English will be a strong benefit
• Internship duration is 1 to 2 month in the period of July to September 2025
• 38.5 hours per week
We offer competitive salaries and additional benefits based on your performance, experience and qualification. The employment is in accordance with the Collective Salary and Wage Agreement for interns of the Electrical and Electronics Industry.
Contact
Marlies Nigitz will be happy to answer any questions you may have.
Phone: +43 3136 500 32853
E-Mail: marlies.nigitz@ams-osram.com
For data protection reasons, we only accept applications submitted through our applicant portal. This allows you to view the status of your application in your profile at any time.
Job details
| Posting date: | 2025/06/11 |
|---|---|
| Experience level: | Student |
| Type of contract: | Internship |
| Employment type: | Full-time |
| Work Model: | On site |
| Business unit: | CMOS Sensors & ASICs |
| Organization: | ams-OSRAM AG |
| Job field: | Administration & Services |
| Job ID: | 21080 |
