你的职责
- Digital module requirements elaboration and capture in close collaboration with System/Digital Architects and Analog Design team members with regards to Analog-Digital interfacing
- Develop digital block architecture under consideration of Automotive quality, testability and safety requirements (ISO26262)Digital RTL design implementation including: state machine design, synchronization, clock gating, low-power strategies, mixed-signal interfacing, static timing analysis (STA), design-for-test (DFT), clock-domain-crossing (CDC), etc.
- Digital design verification on block and top-level (UVM environment) and fault injection simulations according ISO26262
- Digital RTL synthesis using state-of-the-art tools, including DFT, low-power and safety requirements
- Handover and collaboration with Digital Place & Route team, execute gate-level simulation
- Conduct requirements/architecture/design reviews and generate relevant block design and sign-off documentation
- Close collaboration on Design-for-Test strategy with Test Development Engineers to meet Automotive test coverage requirements. Support Test Development with ATPG pattern generation and simulation
- Contributions to continuous improvement of digital design methodology, best practices, guidelines
