Position Overview
We are seeking a highly motivated Design Verification (DV) Intern for a summer internship to work with our R&D team on mixed‑signal ASIC design and verification projects. This role provides hands‑on exposure to real silicon development, allowing interns to contribute to both design exploration and verification activities under the guidance of experienced engineers.
The internship is ideal for students interested in ASIC design verification, digital/mixed‑signal systems, and advanced semiconductor technologies.

Key Responsibilities

• Support design and verification activities for mixed‑signal ASICs
• Assist in developing and executing verification testbenches, simulations, and debug
• Learn and apply ASIC verification methodologies and industry‑standard tools
• Contribute to scripting and automation for verification flows (e.g., test execution, data analysis)
• Review design specifications and collaborate with design and verification engineers
• Document results and present findings to the team

Required Qualifications

• Junior or later, currently enrolled in a 4‑year Bachelor’s program in:
  • Electrical Engineering
  • Computer Engineering
  • Computer Science (with strong hardware interest)
• Interest in ASIC design and verification
• Strong willingness to learn new technologies, tools, and methodologies
• Basic programming or scripting knowledge (e.g., Python, Perl, Tcl, Shell, or similar)
• Good problem‑solving skills and attention to detail

Preferred Qualifications (Nice to Have)

• Exposure to digital logic design, computer architecture, or VLSI concepts
• Familiarity with HDLs (SystemVerilog, Verilog, or VHDL)
• Interest in mixed‑signal systems, sensors, or SoC design
• Experience with scripting for automation or data processing
• Prior coursework or projects related to verification, simulation, or hardware design