Deine Aufgaben
The Master Thesis
“Automated Device Handling for Post Silicon Verification of Integrated Circuits”
aims to improve throughput, repeatability, and automation capability in single‑site measurement environments constrained by hardware, noise, and sensitivity. It integrates mechanical, software, and thermal handling requirements and serves as a foundation for statistical measurement data during post-silicon verification of integrated circuits
• The primary objective is to develop an automated Device Under Test (DUT) handling solution with the following requirements:
• Collect and document technical key requirements
• Automation of DUT transfer between sample trays and standardized load boards
• Ensure consistent, precise positioning across multiple device and PCB formats
• Improve characterization throughput and enable AI-ready data‑generation
• Minimize manual interaction to reduce risk, effort, and measurement variability
• Full automation including temperature‑dependent measurement sequences




















